This relates generally to tile-based rendering.
In tile-based rendering, a display screen is divided into a number of tiles. Generally these tiles constitute rectangular or even square groups of pixels. During a sorting phase, the geometry is sorted into the tiles. The geometry is generally made up of primitives, such as triangles including their vertices. A graphics processing unit (GPU) then renders each tile separately using on-chip buffers to minimize the memory bandwidth.
Since a scene is rendered by processing a number of tiles, the commands for rendering the scene must be re-executed for each tile. However, only a subset of the scene commands need to be executed for any given tile because only a portion of the scene geometry falls within any given tile.
Some tiling implementations handle this situation by reading in a command list for the scene once during the tiling phase and then creating a command list per tile for each of the tiles. However, outputting a command list for each tile creates a significant command bandwidth consumption during the write out operation.
During the rendering phase, since each tile is executing different commands, command caching benefits are precluded.